GPU and FPGA training module

This training module aims to introduce the students to the concept of hardware accelerators and programming of heterogeneous systems. The training is split in two parts, one dedicated to GPU programming and the second dedicated to introduction to FPGAs and Xilinx Vivado High Level Synthesis (HLS) tool to develop firmware for FPGA. The duration of this training is 1 semester (14 weeks). The detailed syllabus and series of lectures (as taught during Fall 2022) can be found below.

  • Course syllabus (2022)
  • Series of lectures for GPU part:
    • Lecture 1 Introduction to hardware accelerators
    • Lecture 2 The GPU and its applications in HEP
    • Lecture 3 Introduction to C++ : Core syntax, variables operators, flow control instructions and functions.
    • Lecture 4 Introduction to C++ : Scopes and namespaces, compound data types and Object Orientation
    • Lecture 5 Introduction to CUDA : Nvidia GPU architecture and CUDA core syntax
    • Lecture 6 Introduction to CUDA : Memory managments, synchonization and error handling
    • Lecture 7 Introduction to CUDA : Coalesced memory access and performance considerations
    • Lecture 8 Introduction to CUDA : Shared memory, atomic operations and the default CUDA stream
    • Lecture 9 CUDA advanced topics : CUDA streams
    • Lecture 10 CUDA advanced topics : C++ standards
    • Lecture 11 Profiling software with Intel OneAPI Toolset Profilers: Vtune and Advisor
    • Lecture 12 Introduction to Nvidia profiling tools : Nsight system and Nsight compute
    • Lecture 13 CUDA advanced topics : Managed memory
    • Lecture 14 Introduction to Alpaka : Performance portability, Alpaka platforms, devices, queues and events
    • Lecture 15 Introduction to Alpaka : Memory managment, device functions and kernels, work division
  • Series of lectures for FGPA/HLS part:
    • Lecture 1 Introduction to FPGA and its architecture
    • Lecture 2 FPGA: Parallelism in program execution
    • Lecture 3 FPGA: Clock Frequency, Latency, Pipelining
    • Lecture 4 Introduction to Vivado HLS, Setup
    • Lecture 5 Hands-on with vivado_hls, output review
    • Lecture 6 Hands-on with vivado_hls, Introduction to Pragmas
    • Lecture 7 Vivado HLS: Pragmas & more examples
    • Lecture 8 Vivado HLS: Pragma’s effect on performance
    • Lecture 9 Vivado HLS: More pragmas and Do’s & Don’ts
    • Lecture 10 Vivado HLS: More pragmas and HLS coding styles
    • Lecture 11 LHC, CMS Level-1 Trigger, Project
    • Lecture 12 Project: Re-designing RCT
    • Lecture 13 Introduction to VHDL
    • Lecture 14 Introduction to VHDL contd.